Causal Block Diagram (alg+discrete-time)  

General Information

  • The due date is Friday 20 January 2012, before 23:55.

  • Submissions must be done via WebCT. Beware that WebCT's clock may differ slightly from yours. All results must be uploaded to WebCT and accessible from links in the main (index.html) file. There is no need to upload AToM3.

  • The assignment must be made in groups of maximum 2 people. It is understood that all partners will understand the complete assignment (and will be able to answer questions about it). Clearly identify who did what.

  • Grading will be done based on correctness and completeness of the solution. Do not forget to document your requirements, assumptions, design, implementation and modelling and simulation results in detail!

  • Extensions, if given, will involve extending not only the alotted time, but also the assignment !

The assignment

You will build a Causal Block Diagram (CBD) simulator for (a) un-timed semantics and (b) discrete-time semantics.

You will use the CausalBlockDiagramsV2.tgz formalism in the AToM3 environment (installed on the lab computers). You should install the Causal Block Diagrams formalism in the Formalisms directory under AToM3's main installation directory.
You may also install AToM3 on your own computer. Just download and uncompress it in a directory of your choice. The first time you run AToM3, it will ask you where you would like your User Folder where you may store user models. AToM3 works under Unix and Windows. You need Python 2.x installed.

As demonstrated in class, you can build models:

  1. Start AToM3 (python
  2. Open the CausalBlockDiagramsV2 formalism: right click on the canvas in AToM3, then File Menu/Open meta-model (or press the function keyF3). Press the Central Formalism Dir button and select the CausalBlockDiagramsV2 folder. Subsequently, select the file This will load the CausalBlockDiagramsV2 formalisms and buttons for each of the CBD blocks will appear above the canvas.

  3. Press the Edit button. This will pop up a form. You should fill in the name entry field with the name of your model. This name will be used when you later press the Generate Sim button to determine the filename for generation (the name you filled with .py extension). This generated file does not contain graphical information ("concrete visual syntax"). It only contains the essential information ("abstract syntax") your simulator will need.
  4. To save your model from AToM3 with visual information, right click on the canvas in AToM3, then File Menu/Save model (or press Ctrl-SF). The convention is that you use the same name as you gave above followed by _CBD, to remind later users (and yourself) that this is a CBD model.
  5. To instantiate CBD blocks on the canvas, left-click on one of the block icons above the canvas. Then, Ctrl-right-click to instantiate.
    To connect (ports of) CBD blocks on the canvas, Ctrl-left-click on the starting-point of the connection, then optionally left-click for intermediate points, and finally left-click on the end-point of the link.
  6. You should give all blocks unique names (double-left-click on a block to pop up a form to fill its name).
  7. We make the assumption that all blocks have exactly one output. Multiple outgoing links (signals) may be connected to a block's output port. They will all have the same name (as they denote the same signal). You may set the signalName either in the port or in the link (they will be kept consistent).
  8. AToM3 will try to warn you when your model is syntactially incorrect. In particular, it may refuse to save your model is there are blatant errors in it which need to be fixed.

Implement the missing functions (marked with # TO IMPLEMENT) of the simulator (atom3/Formalisms/CausalBlockDiagramsV2/ST_CBD/ to realize the following:

  1. The construction of the dependency graph (already given in :)
  2. [10%] Given an algebraic loop, detection of whether it is linear;
  3. [10%] Given a linear algebraic loop, construct input for a linear solver; the format of the input should be:
    // Input for the solver is of the form: [M1, M2], where
    //      [[ C11, C12, C13 ],
    // M1 =  [ C21, C22, C23 ],
    //       [ C31, C32, C33 ]]
    // M2 =  [ C1,  C2,  C3 ]
    // represents the following linear equation system:
    // {
    //   C11*x + C12*y + C13*z = C1
    //   C21*z + C22*y + C23*z = C2 
    //   C31*z + C32*y + C33*z = C3
    // }
    // where x, y, and x are signals (block outputs) inside a strong component.
  4. [10%] For each of the blocks, write the computation they need to perform. In this assignment, you only need to implement the algebraic blocks and the delay block (not integrator and derivative blocks).

    The blocks you should implement (if not already done for you in ST_Simulator are: Constant, Negator, Inverter, Adder, Product, and Delay.

    Some implementation information:

    block.linksIN is a list of input signal structures of a block. If all inputs are indistinguishable, even if there is more than one input port, as in the case of the Adder block, one may just loop over linksIN by referring to linksIN[i]. If there is only one input signal, as in the case of a Negator, one may of course directly refer to the first signal linksIN[0].
    The input signal structures have the form (influentBlock, signal_name, port_name) with influentBlock a reference to the block whose (single) output is connected, through a port with name port_name, to this signal which has name signal_name.
    If inputs need to be distinguished, they will have a specific name, and can be referred to by that name. In particular, you can refer to the block connected to the Initial Condition input port of a Delay, Integrator, Derivative block by block.IC[0]. Note that 0 is used as index as only one block should be connected to an IC port.
    The signal on the output of a block is stored as a list of values, one for each time-step. To acces this list, use block.signals.
  5. [10%] The Test block should be implemented correctly and tested separately. This means you need to provide a test model which includes a Test block.

    Some implementation information:

    For a Test block block, you can access
    • the test input signal as block.__getInputBlocks()[0];
    • the block connected to the True input port as block.TRUE_in[0];
    • the block connected to the False input port as block.FALSE_in[0].
    As test condition, you should compare the test input signal to 0. The True input should be selected and copied to the output if the test input signal is strictly larger than 0.

[50% -- 10% per item] Provide test models and their results to demonstrate the correctness of your solution:

  1. Simple algebraic models without loop, one for each algebraic block;
  2. A non-trivial algebraic model without loop to test sorting;
  3. An algebraic model with a non-linear loop;
  4. An algebraic model with a linear loop ;
  5. An algebraic model with at least two linear loops, and computation in between;
Provide links to all files.

[remaining 10%] proper documentation.

Maintained by Hans Vangheluwe. Last Modified: 2012/01/17 03:50:44.